Computer Architecture/C.A (ETH Zürich, Spring 2020)

Lecture 4: Combinational Logic 1

Tony Lim 2021. 6. 3. 21:45
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we are going to learn about microprocessors by programming FPGAs with Verilog.

 

Transistors (devices , lower than logic gates)

Mos Transistor

Conductors (Metal) = cupper , gold , silver

SemiConductors  = Si , Ge ...  they are neutral if they are pure.  engineer some region to have + or - charges.

Insulators (Oxide) = Rubber , ceramics , vaccum , air , glass

 

MOS

The width and length are related to the magnitude of the current. 

 

n-type = low voltage == disconnect , high voltage == wire 

p-type = low voltage == wire  , high voltage == disconnect

 

Build Logic with MOS transistors

CMOS = n-MOS + p-MOS

with NAND is enough to build every other gates. it has only 4 transistors.

 

 

first draw nMos. whenever Inputs (ABCD) are AND draw them in serial , if OR draw them in parallel.

second draw pMos. whenever nMOS is serial draw them parallel , if parallel draw them in serial.

 

pMOS trasistors pass1's well but 0's pooly nMOS works the otherway.

 

Latency

Transistors in series is slower , parallel is faster

 

Power Consumption

we fight with C and f only

Energy Consumption == Power * Time 

 

Combinational logic = memoryless , what we learned so far.

Sequence logic = has memory

 

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